Every IBM Power Systems administrator eventually encounters the “Black Box” scenario: an LPAR is triggered to reboot, no Reference Code appears on the HMC, and the terminal remains frozen—often stuck on a…
Author: Adam Waściński
Stop Wasting CPU Cycles: Hardware-Accelerated Compression on IBM Power
Data compression is standard requirement in modern IT infrastructure. We do it daily to save storage space and reduce network bandwidth. However, traditional software compression comes with a hidden tax—it is a…
Package Management in AIX: How to Enable autofsinstall and Say Goodbye to Manual Fileset Hunting
Every AIX administrator is familiar with this scenario: you start working in a new environment and find out that a necessary command is missing from the system. Until now, adding these tools…
RMC In-Band: The Quiet Revolution in AIX 7.3 TL4
If you’ve spent any time managing IBM Power environments, you know the drill: you deploy a new LPAR in an isolated VLAN, and… nothing. The HMC can’t see it. You end up…
AIX System Dump: Your Server’s “Flight recorder”
Even on the best-maintained LPAR partitions, critical errors (system crashes) can occur that you simply can’t predict. When the system suddenly crashes, you have two options: either you try to read tea…
Using Ansible for HMC Update
When managing the HMC console, the activity that needs to be done from time to time is to update it. In the life cycle of the console, ifixes and servie packs are…
AIX – health check of NVME drives
Since the release of the Power9 servers, the new servers come with NVMe drives. Internal NVMe drives can be used to install VIOS. This raises the question of what condition the NVMe…
Error Analysis in AIX: Interpreting ERRPT Sense Data
In the AIX system, when an error occurs, information about it is logged in the error log. By reviewing the errors that have appeared in the system (errpt), we can read basic…
Memory Optimization on IBM Power Servers
Power servers are multi-processor systems built on the NUMA (Non-Uniform Memory Access) architecture.In this architecture, each processor has a directly attached portion of RAM and can also access the entire server memory…